Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

af Andreas Burg, m.fl.

Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.